![]() This project uses my own implementation of a RISC-V core in VHDL (see link ). ![]() There are numerous implementations of the RISC-V specification, commercial and open source, in different hardware description languages and implemented as real silicon chips (e.g. ![]() Of course not a processor core competing with a Intel processor or an Arm application class core, but something comparable with a Cortex-M micro controller core.įor doing so RISC-V is a very good starting point, it is an open Instruction Set Architecture (ISA) developed originally by the EECS Department at the University of California, Berkeley and now maintained by the RISC-V foundation. As a single person I can basically design my own chip. ![]() FPGAs are a great tool to democratize access to hardware design. ![]()
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